1. Field
Exemplary embodiments relate to a semiconductor device fabrication technology, and more particularly, to a nonvolatile memory device and a method for fabricating the same.
2. Description of the Related Art
With a technological advancement in digital media devices, anyone may conveniently access desired information anytime and anywhere. As a conversion is made from analog to digital, a variety of digital devices have required storage media that may conveniently store captured images, recorded music and various data. In order to meet this requirement, there is a growing interest in the field of system-on-chip (SoC) according to a tendency for a high degree of integration of non-memory semiconductors, and semiconductor manufacturers compete to invest in the field of SoC in an effort to strengthen an SoC-based technology. The SoC means that system technologies are integrated in one semiconductor. If a system design technology is not secured, it may be difficult to develop non-memory semiconductors.
In the field of SoC where complicated technologies are integrated, a need for an embedded memory to trim an analog device or store an internal operation algorithm is gradually increasing as a chip with a composite function in which a digital circuit and an analog circuit are mixed is often used recently. Research for a flash EEPROM (electrically erasable programmable read-only memory) as an embedded memory has been actively conducted. This is because the flash EEPROM is a highly integrated nonvolatile memory device that may store data even in a power-off state like a ROM and may electrically erase and program data. EEPROMs include a single gate EEPROM having one gate (for example, a floating gate), a stack gate (ETOX) EEPROM in which two gates (for example, a floating gate and a control gate) are vertically stacked, a dual gate EEPROM that corresponds to the middle of the single gate EEPROM and the stack gate EEPROM, and a split gate EEPROM.
Because the characteristics of an analog device easily change by process variables, an embedded memory to be applied to a system-on-chip including an analog device may be fabricated on the basis of a CMOS process or a logic process while suppressing a separate process from being added to form the memory, so that the number of process variables is minimized.
However, in the conventional art, since the EEPROMs other than the single gate EEPROM may need an additional process besides a logic process, limitations may exist in applying the stack gate EEPROM, the dual gate EEPROM, and the split gate EEPROM to an embedded memory. Conversely, while the single gate EEPROM may be formed on the basis of a logic process without a separate additional process, since a floating gate may be coupled using an impurity region that is formed in a substrate, that is, a well, a disadvantage may be caused in that the degree of integration may be degraded.